BIST (Built-in-Self-Test) Memory Design Using Verilog

fig 13
Fig. 13: Transcript window (result shown)

Xilinx FPGAs also provide dedicated memory that can be used in various applications. There is a built-in error-correction capability for Xilinx block RAMs. Each block RAM has an error-correcting code circuitry associated with it. This can be enabled to correct single-bit errors and detect double-bit errors. So, effectively, Xilinx FPGAs have both BIST as well as built-in self-repair (BISR), where repair can be done for a single bit.

Among the various modes (single port, simple dual port and true dual port) supported by block RAM, error-correcting code is supported in simple dual-port mode. In this mode, the block RAM can be configured as 512 x 64 RAM. The extra eight bits in the 72-bit wide RAM are used towards built-in Hamming code-error correction.

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Sample code. If you want to use error-correcting code facility of Xilnx BRAM, set the corresponding parameters/ports during instantiation, as shown in the following Verilog example:
[stextbox id=”grey”]ramb36e2 #(
.en_ecc_pipe(“true”),// enabled
pipeline on ecc, for higher
.en_ecc_read(“true”), // enabled ecc
for read
.en_ecc_write(“true”),// enabled ecc
for write
.read_width_a(72),// read width port
a – 72 in sdp mode
.write_width_b(72)) // write width
port b – 72 in sdp mode
// other ports
.eccpipece(1’b1), // to enable ecc
pipelines, connect enable or 1
.casoutsbiterr(), // use in
cascade mode
.casoutdbiterr(), // use in
cascade mode
.sbiterr(sbiterr), // single bit
error status
.dbiterr(dbiterr), // double bit
error status
.eccparity(eccparity) // parity bits

If you like this DIY, you may also like FIFO Design Using Verilog

Nidhi Kathuria is a senior application engineer at EFY Tech Center, New Delhi


  1. Hello sir I want to contact the author of this article that is Nithin Kumar Guggilla for further assistance in my project.So can you please share your mail ID it would be a great help.
    Looking ahead for your reply
    Thank you

  2. hello sir, ive tried this tutorial using modelsim 10.4 student edition and my problem now is this error shows up “# Cannot open macro file:” when i wrote “do” for simulation. Any solution sir ?


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