HomeElectronics NewsAdvanced Scalable Power Architecture For Automotives

Advanced Scalable Power Architecture For Automotives

New configurable power architecture targets automotive SoCs, AI systems and industrial platforms, combining PMIC and DrMOS integration to simplify design, improve efficiency and enable scalable high-current power delivery for next-gen electronics.

Advanced Scalable Power Architecture For Automotives

A new configurable power supply architecture has been introduced by ROHM Semiconductor to address rising demands from high-performance automotive SoCs, AI computing platforms, and industrial electronics, where increasing power density and system complexity are pushing conventional designs to their limits.

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The solution is built around a flexible combination of multi-channel PMICs and DrMOS power stages, enabling engineers to scale power delivery from low-end control systems to high-current, performance-intensive processors without redesigning entire power architectures. The approach aims to reduce development cycles while improving efficiency, thermal performance, and design reuse across product generations.

The key features are:

  • Configurable combination of PMIC and DrMOS for scalable power delivery
  • Supports low-voltage, high-current requirements for advanced SoCs
  • Designed for automotive, AI computing, and industrial applications
  • Reduces system redesign effort through reusable power architecture
  • Improves efficiency and thermal performance in compact form factors

At the core of the design strategy is a “configurable power” concept that allows system designers to mix and match power-management components based on application needs. This reduces dependence on custom power circuitry, which traditionally increases engineering effort and slows time-to-market in automotive electronics and embedded AI platforms.

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The architecture is particularly aligned with next-generation automotive workloads such as ADAS, driver monitoring systems, and high-resolution sensing platforms, where multiple compute-intensive SoCs require tightly regulated, high-current power rails. It also addresses industrial and edge AI systems that demand compact, thermally efficient power delivery solutions for continuous operation.

Beyond flexibility, the design emphasises energy efficiency and compact integration. The use of advanced power stages helps improve conversion efficiency while reducing board space, supporting the industry shift toward smaller, higher-performance electronic control units and server-side AI acceleration hardware.

Click here for the original announcement.

Akanksha Gaur
Akanksha Gaur
Akanksha Sondhi Gaur is a journalist at EFY. She has a German patent and brings a robust blend of 7 years of industrial & academic prowess to the table. Passionate about electronics, she has penned numerous research papers showcasing her expertise and keen insight.

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