Low-Power Radiation-Tolerant FPGAs In Engineering Silicon

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Customers can prototype with the FPGA silicon package that is now headed for full QML class V spaceflight qualification

With the release of the engineering silicon, space-qualified RT PolarFire Field Programmable Gate Array (FPGA), designers can now create hardware prototypes using its electrical and mechanical performance. The space-qualified RT PolarFire FPGAs provide high-bandwidth for on-orbit processing systems, low power consumption and the ability to withstand radiation effects in space.

The RT PolarFire FPGAs increase the computational performance of satellite payloads, enabling them to transmit processed information rather than raw data and make optimal use of limited downlink bandwidth. The devices give high performance, logic density and serializer-deserializer (SERDES) bandwidth. They also enable more system complexity than previous FPGAs and can withstand Total Ionizing Dose (TID) exposure beyond the 100 kilorads (kRads) typical of most earth-orbiting satellites and many deep-space missions. Their power-efficient architecture reduces power consumption up to 50 per cent compared to SRAM FPGAs, leveraging SONOS configuration switches that also eliminate the problem of configuration upsets due to space radiation.

The RT PolarFire RTPF500T FPGAs is qualified to high screening standards such as Mil Std 883 Class B, QML Class Q and QML Class V for monolithic integrated circuits in space. Designed to survive a rocket launch and meet demanding performance needs in space, RT PolarFire FPGAs are ideal for applications that require high levels of operating performance and density, low heat dissipation, low power consumption and low system-level costs including:
⦁ High-resolution passive and active imaging
⦁ Precision remote scientific measurement
⦁ Multi-spectral and hyper-spectral imaging
⦁ Object detection and recognition using neural networks.

The RT PolarFire RTPF500T FPGA engineering models are available from Microchip Technology in a hermetically sealed ceramic package with land grid, solder ball and solder column termination options. They are supported by development boards, Microchip’s Libero software tool suite and radiation data.


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