Monday, July 15, 2024

RISC-V Chip, Inculcates The Open Source Technologies

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A RISC-V two core chip with open source software was built by 12 students in Denmark. The chip is being made for free in the United States thanks to a partnership between Google and foundry Skywater. The students are taking a chip design course at Denmark Technical University (DTU), which is the first time the university has taught the subject and uses open source tools.

The European Chips Act, according to the university, is spurring the demand for additional chip designers in the region. Jrgen Kragh Jakobsen, an analogue chip designer at IC Works, suggested that Martin and Luca create the special course to pique young people’s interest in chip design and assists with the course.

“We need innovation in this area. And the special course here is the first generation of some chip designers working with open source tools. We have not seen that before. And it will explode over the next few years,” said Jakobsen.

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A 32-bit RISC-V core and Patmos, a time-predictable multi-processor platform developed at DTU, are used in the dual-core chip. While Patmos can control time-critical activities like rotor blades on a drone, RISC-V can handle non-time-critical processes.

The open source tools are part of the Skywater 130nm Process Design Kit (PDK), which includes an open source RTL2GDS design stack dubbed openLANE developed by Efabless and licenced under the Apache 2.0 licence. A standardised test harness is open and free to use, allowing verification results to be duplicated quickly and cheaply.

The DTU microprocessor is built on a dualcore system with two processors: a RISC-V 32-bit CPU and Patmos, a time-predictable multiprocessor platform developed at DT.

“For years, we have talked about open source software. Now comes open source hardware. It is groundbreaking that we can use free tools to design the chip. Because usually, it is so expensive to buy licenses for the various tools you use to make a microchip that only companies have had the opportunity to do so,” said Professor Martin Schoeberl. He leads the course together with Assistant Professor Luca Pezzarossa.

“It is impressive and inspiring to see how a relatively small group of BSc students can work together on the difficult challenges associated with the chip design process, and produce concrete results in such a short amount of time. In addition to the chip design process, the students learn the value of constructive teamwork, which I believe is a fundamental skill for future engineers,” says Luca.


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