From chiplets and TSV metrology to ultra-fine wire and bump inspection, the latest semiconductor inspection and metrology technologies, promising higher yields, tighter process control, and enhanced reliability for next-generation packaging.
TRI’s expanded inspection and metrology portfolio addresses the fast-evolving needs of advanced semiconductor manufacturing, covering applications such as chiplet and chip-on-wafer (CoW), system-in-package (SiP), advanced WLP, TSV metrology, μBump, Cu pillar, surface topology, thin film thickness, patterned wafer analysis, inner crack/chipping detection, post-sawing defect inspection, die underfill, epoxy/flux analysis, wafer bumping, and die/wire bonding.
TR7950Q SII — a high-precision wafer inspection and metrology platform engineered for macroscopic 3D inspection and micro-scale measurement. It supports advanced WLP, wafer frame, patterned wafer, wafer bumping, WLCSP, TSV, and thin-film applications, providing manufacturers with detailed process visibility to enhance yield and quality.
In the back-end inspection arena, TRI debut the TR7007Q SII-S, optimized for C4 bump (~100 μm Ø) metrology, Mini-LED, and ultra-fine 008004 paste inspection. Complementing it is the TR7900Q SII-R Reject Station, featuring AI-powered 3D inspection for die, ultra-fine wire diameters down to 15 μm (0.6 mil), SiP, underfill, and bump analysis.
By integrating advanced optical, metrology, and X-ray inspection technologies, TRI aims to help semiconductor manufacturers accelerate production, tighten process control, and achieve higher first-pass yields in an era of shrinking geometries and heterogeneous integration.
