Tuesday, June 25, 2024

World’s Largest FPGA-Based Adaptive SoC

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The Versal Premium SoC integrates FPGA-based emulation and prototyping, delivering high performance, rapid debugging, support for 60B+ gate designs, and a comprehensive set of tools.

SoC

AMD has launched the Versal Premium VP1902 system-on-chip (SoC), recognised as the largest adaptive SoC globally. The SoC utilises chipset-based technology to enhance the verification process for intricate semiconductor designs. With double the capacity compared to its predecessor, this advanced solution empowers designers to drive innovation and validate application-specific integrated circuits (ASICs) and SoC designs. FPGA-based emulation and prototyping offer unparalleled performance, enabling accelerated silicon verification and empowering developers to start software development much earlier in the design cycle, even before silicon tape-out. With each generation, the capacity of these devices has nearly doubled, solidifying their position as the highest-capacity solutions available.

 The chip delivers 18.5 million logic cells with a 2X2 increase in programmable logic density and a 2X4 aggregate I/O bandwidth compared to the previous generation. The adaptive SoC utilises Versal architecture, including programmable network-on-chip, for up to 8 X 5 faster debugging than prior FPGA. The SoC includes features such as automated design closure assistance, interactive design tuning, remote multi-user real-time debugging, and improved back-end compilation, which enables end users to iterate IC designs faster. 

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Some of the key specifications of the SoC include:

  • 2X^2 capacity with 18.5M logic cells
  • 2X^3 I/O bandwidth for chip-to-chip interfacing
  • 2.3X^4 transceiver bandwidth with 112G PAM-4
  • Up to 2X^5 performance at the system level
  • Versal architecture unlocks up to 8X^6 debug performance
  • Scalable to support 60B+7 gate designs
  • Co-optimised with Vivado design suite
  • Novel place-and-route tuned for multi-SLR designs
  • IP supporting debug and multi-device designs

“Delivering foundational compute technology to enable our customers is a top priority. In emulation and prototyping means delivering the highest capacity and performance possible,” said Kirk Saban, corporate vice president, Product, Software, & Solutions Marketing, Adaptive and Embedded Computing Group, AMD. “Chip designers can confidently emulate and prototype next-generation products using our VP1902 adaptive SoC, accelerating tomorrow’s innovations in AI, autonomous vehicles, Industry 5.0 and other emerging technologies.”

For more information, click here.

Nidhi Agarwal
Nidhi Agarwal
Nidhi Agarwal is a journalist at EFY. She is an Electronics and Communication Engineer with over five years of academic experience. Her expertise lies in working with development boards and IoT cloud. She enjoys writing as it enables her to share her knowledge and insights related to electronics, with like-minded techies.

2 COMMENTS

  1. “The adaptive SoC utilises Versal architecture, including programmable network-on-chip, for up to 8 X 5 faster debugging than prior FPGA.”

    It’s just 8x faster

    1 Based on AMD internal analysis in May 2023 with a 6-input LUT count to compare the Versal Premium VP1902 device versus the Intel Stratix 10 GX 10M FPGA. (VER-002)
    2 Based on AMD internal analysis in May 2023, comparing the number of system logic cells of the Versal Premium VP1902 device versus the Virtex UltraScale+ VU19P device. (VER-001)
    3 Based on AMD internal analysis in June 2023, comparing the number of system logic cells of the Versal Premium VP1902 device versus the Virtex 5 LX330T device and calculating an average across six generations. (VER-010)
    4 Based on AMD Labs testing using an A6865 package to simulate the XPIO data rate performance of an AMD Versal Premium VP1902 device versus the published data rate of an AMD Virtex UltraScale+ VU19P FPGA. Actual results will vary. (VER-003)
    5 Based on AMD internal analysis in May 2023, comparing the readback/writeback performance of an AMD Versal adaptive SoC CFI interface versus an AMD Virtex UltraScale+ FPGA ICAP interface. Actual performance will vary. (VER-004)

    The final letter 5 is the condition explained in the article

    Text formatting issues.

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