Tuesday, March 19, 2024

Unified IDE for Supporting Wider Adoption of RISC-V Platform

By Sharad Bhowmick

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Intel has released Intel Pathfinder, a unified Integrated Development Environment (IDE) for supporting wider adoption of the RISC-V platform. The pathfinder can simplify developing products using RISC-V cores and IP from the partner ecosystem, and instantiate on FPGA and simulator platforms, with the ability to run industry-leading operating systems and toolchains within a unified IDE. The IDE provides new capabilities for the pre-silicon development phase. The IDE comes with an industry-standard toolchain and robust software, moreover, it can save time in assembling and testing different IP combinations in a single environment.

“Intel Pathfinder for RISC-V represents our ongoing commitment to accelerate the adoption of RISC-V and catalyze the ecosystem around an open-source and standards-based vision,” said Vijay Krishnan, General Manager, RISC-V Ventures from Intel.

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Intel has developed the new Pathfinder platform to support system-on-chip (SoC) architects and system software developers to create their own products using a variety of RISC-V cores and intellectual property (IP) from the partner ecosystem.

“The Incubation & Disruptive Innovation (IDI) Group at Intel has the charter to identify and grow new business opportunities. The launch of the Intel Pathfinder for RISC-V illustrates our continued commitment to bringing these opportunities to life,” said Sundari Mitra, Chief Incubation Officer, Corporate Vice President, and General Manager, IDI.

The IDE is available in two versions, a free version called “the starter edition” which has been launched for academia and research community, hobbyists. The “Professional Edition” is intended for more advanced users and offers broad ecosystem support, and targets organizations involved in commercial RISC-V-based silicon and software.

Features of Intel Pathfinder Platform:

  • Access a wide range of RISC-V cores, multiple operating systems, and leading toolchains.
  • Test drive pre-silicon concepts on Intel® FPGAs or simulate on virtual platforms.
  • Reduce design friction and get to market faster.

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