Six more for the servers
If six cores is the current high score for desktop CPUs, server-focused processors can boast of six more.

AMD’s new server processor, code named Magny Cours, is designed for two- and four-socket servers and uses faster DDR3 memory. This processor will be offered in the market as Opteron 6100, in both eight- and 12-core versions. Both chips will be manufactured using a 45nm manufacturing process. The company has also hinted that by 2011, Magny Cours will be replaced with Interlagos—a more powerful 32nm chip that will come with 12 and 16 cores based on AMD’s Bulldozer microarchitecture.

Intel single-chip cloud computer (SCC) has 48 Intel cores and runs at as low as 25 watts
Intel single-chip cloud computer (SCC) has 48 Intel cores and runs at as low as 25 watts

The company has also revealed a new Opteron chip (codenamed Lisbon) for servers with one or two processor sockets. This will be available in four-and six-core versions as the Opteron 4100 series. By 2011, Lisbon will be succeeded by Valencia—a 32nm chip offering six and eight cores based on Bulldozer.

A team with multiple capabilities
“Last year, we launched the six-core Istanbul processor; we are currently working on the eight-core and 12-core processors, and plan to launch it by the first half of 2010. Apart from this, we are also planning a six-core desktop CPU. While these homogeneous multi-core processors continue to evolve over next couple of years, you will see a movement towards heterogeneous multi-core processors in the future,” comments Vamsi Krishna, senior manager-technical, AMD. “AMD has plans to release its first heterogeneous multi-core processor (codenamed Fusion), where we integrate multiple x86 cores and graphical processing unit (GPU) cores on a single die. This will be the beginning of new multi-core revolution in the future.”

Deep down, the idea behind Fusion is to enable a mix-and-match strategy at the silicon level, through a broad range of design initiatives. AMD will provide a range of application-specific cores that can easily be combined and heaped onto a processor die and fabricated at a low cost. A quad-core processor might contain different combinations of cores, say, two general-purpose cores and two specialised processor cores, or one general-purpose core and three specialised cores, and so on. That is, a processor can be put together from heterogeneous cores, based on the end-use and workload.

Krishna adds, “The Fusion project completely leverages the multi-core concept and Direct Connect architecture, enables a homogeneous programming model for all AMD products, and standardises the coprocessor interface for on-die and platform connectivity. Fusion-based processors, with the CPU and GPU integrated in a single architecture, should make the life of software programmers and application developers much easier.”

Cloud on a chip
System-on-chip is old news. Here is a whole cloud on a chip—Intel’s brain-child with 48 cores!

“Most recently we announced the prototype, single-chip cloud computer (SCC). This research chip contains the most Intel architecture cores ever integrated on a silicon CPU chip—48 cores. It incorporates technologies intended to scale multi-core processors to 100 cores and beyond while consuming less electricity than two standard household light bulbs,” says Vasantha Erraguntla, engineering manager, Intel India.

“Architecturally, the chip resembles a small cluster or ‘cloud’ of computers on a chip. It was designed as a concept vehicle for parallel software research. We will be working with industry research and academia partners to further parallel computing research using this vehicle.”

You might recollect that the same team also successfully tested an 80-core teraflop processor a few years ago. Following that, the team was confident of the success of the SCC. However, this chip seems more complex, with a much larger die size, system-level complexities and the challenges of 45nm physical design to boot. The success of this chip will make processors more scalable than you ever thought possible, and also accelerate multiple-core software research and advanced development.

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