Wednesday, March 22, 2023

“Mixed-signal design is very different from VLSI”

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Q. What’s happening in the interface logic section? What kind of advances can we expect in the coming years?
A. Interface logic includes a broad category of level shifters. A system-on-chip (SOC) runs on very low voltage, while interface connectivity runs on higher voltages. For these, you need universal level shifters from 0.9 V up to 5.5 V. These level shifters find applications in portable devices and in I2C bus repeaters where two different supply voltages are encountered.

Q. What are the key features of redriver signal conditioners and how do they help the embedded products that they go into?
A. Key features of redrivers are support for various power saving modes during receive idle, hard disk drive unplug and standby conditions, power supply voltage down to
1.05 V, high output swing, and I2C programming of redriver configurations such as transmit output swing, de-emphasis and receive equalisation. These help embedded applications that need these power-saving options. Additionally, there is the flexibility of one to four port offerings depending on the number of channels that need redriving.

Q. How difficult is it to design mixed-signal ICs? What are the challenges?
A. Mixed-signal design is very different from VLSI design methodology. First of all, the design engineer needs to understand the logic function and transistor-level characteristics, which means the physics of the microelectronics.

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The mixed-signal design knowledge is a process of accumulation. Mixed-signal design has several tools in terms of process, geometry, and on-board passive and transistor-level components to achieve the required function and performance. In terms of challenges, for PLL, jitter and lock time are important parameters. For redriver, optimising the eye opening is important. For differential signal switches, minimising the insertion loss, return loss, crosstalk and off-isolation is important.

Q) What are the latest solutions available to engineers designing for the communications market?
A. For portable applications, we are able to provide a very low power 32KHz oscillator in a small footprint at a high accuracy for keeping the product in the standby mode when not in active use and at the same time keeping accurate time. Also, to provide reference for the wireless, we provide clip sine oscillators that provide reduced harmonics and enable complying to EMI requirements. Also, we provide very precise TCXO for GPS and GSM applications.

For the high-speed switches, routers and base stations, we provide very highly-integrated, programmable clock generators that we call HiFlex Clocks. They integrate multiple different frequencies in one clock chip and provide multiple copies of those frequencies. As a result, customer is able to provide a very small footprint, low cost solution to eliminate multiple oscillators and multiple clock buffers on the board.

Also, we have a set of application specific crystal oscillators which are proven in networking applications – we call them as ASSP XO. What this brings to customer is proven solution that is designed to work seamlessly and also readily available rather than wait for it to be made. For the high-speed backplanes we provide signal conditioning redrivers. For redundancy applications in GE, we provide application specific LAN switches.
For the router market, we also provide VCXO for line access applications as well as PCI express-based timing and packet switch.

Q. Could you tell us more about conditioning of high-speed signals and its importance today?
A. Data rates are increasing in both networking and storage, and there is a definite need to drive these internally as well as externally at high speeds and for longer distances. Even at 6Gbps speed for SATA applications, driving from the chipset is not strong beyond 15 cm (6 inches) of PCB trace and hence redrivers are required internally. Currently, redrivers are required for Express, USB, HDMI, DP, SAS/SATA and 10 GE.



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