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Location: Bengaluru
Company: Altera
Job Description
We are seeking a highly motivated intern currently pursuing or holding a Master’s degree in Electronics or Computer Engineering with a specialisation in VLSI. The ideal candidate will possess foundational knowledge of VLSI design and validation, with additional experience in high-speed design challenges seen as advantageous. This ACE program provides an exciting opportunity to engage directly with post-silicon system validation activities for next-generation Altera FPGA products, specifically focusing on high-speed transceiver protocols. Find details of the ACE program here.
Qualifications
Key Responsibilities:
- Support the FPGA post-silicon system validation group in ongoing and upcoming projects or new methodology initiatives.
- Assist in the development and implementation of innovative validation and debugging solutions.
- Document technical specifications clearly and maintain organised records of project progress.
- Collaborate closely with validation team members to understand and improve workflows and methodologies.
- Prepare and present updates and findings to stakeholders as required.
Skills and Qualifications:
- Familiarity with HDL languages (VHDL, Verilog, SystemVerilog).
- Experience or knowledge in scripting languages such as Tcl, Perl, or Python.
- Prior experience or exposure to FPGA tools (Quartus or Vivado) would be advantageous.
- Strong willingness to learn new skills and technologies.
- Ability to work collaboratively within a team environment.
- Good communication skills and ability to clearly present project details and outcomes.
What You’ll Gain:
- Practical understanding of validation principles, methodologies, and importance.
- Skills development in Verilog, RTL Design, SystemVerilog, Python, Tcl, and Unix, depending on validation coverage (pre-silicon or post-silicon).
- Hands-on experience with FPGA design and tools such as Quartus.
- Exposure to platform setups, hardware equipment, and automation systems.
- Domain expertise in high-speed protocols (e.g., 802.3 standards or other high-speed transceiver-based protocols).
