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- Define the microarchitecture of Memory buffer chips. This involves starting with industry standard specifications, defining sub-systems (e.g. Tx/Rx/Clocking/Data-path/Power Management) implementations using analog/digital IPs.
- Create specifications for
- sub-systems on chip (e.g. Tx/Rx/Clocking/Data-path/Power Management)
- digital-analog interfaces and partitions
- pin-outs, bump-outs, floor plans
- functionalities to support the protocol/system level requirements
- algorithm for digital calibrations of analog circuits and system level trainings/adaptations
- test/debug logic etc.
- Do feasibility studies including analog and digital building blocks to arrive at trade-offs and find best solutions for chip implementation
- Collaborate with architecture team, other cross-functional teams and technical experts in various geographies to define and align on the chip implementation specification.
- Understand and disseminate applicable standards and its relevance in a given project to the team.
- Work with the system engineering team for silicon bring up and characterization.
- MS/M-Tech degree in electronics/VLSI and in exceptional cases B.E/B-Tech in electronics engineering with 4+ years of relevant experience needed. (The experience profile will depend on the job level of the position)
- The candidate should have experience:
- working on mixed signal designs
- designing memory systems such as DDR, LPDDR, GDDR, HBM
- working on design/micro-architecture/architecture for high-speed interfaces (e.g. Memory PHYs, SerDes).
- working in leading R&D and future technology development projects is desirable.
- The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams.
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