The shrunken TCAM design can bring configurable macros, staged search logic, and safety partitioning within automotive focused system-on-chip environments.
Renesas Electronics Corporation has developed a configurable ternary content-addressable memory (TCAM) built on a 3 nm FinFET process, combining high memory density, low power consumption and enhanced functional safety for automotive system-on-chip applications.
The 3nm TCAM addresses growing demand for large and diverse configurations driven by 5G and cloud and edge computing workloads. By enabling flexible block sizing and scalable architectures, the design supports high-density implementations such as 256-bit by 4,096-entry arrays while maintaining energy efficiency. The solution achieves a memory density of 5.27 Mb/mm² and, in a 256-bit by 512-entry configuration, delivers search energy as low as 0.167 fJ per bit with a 1.7 GHz search clock. Its figure of merit, calculated as density multiplied by speed divided by energy, reaches 53.8, exceeding prior reported results.
The architecture combines finely configurable hard macros, supporting 8 to 64-bit key widths and 32 to 128 entry depths, with tool-driven soft-macro auto-generation. This integrated approach enables flexible single-macro configurations across a broad range of use cases while limiting peripheral overhead. Each hard macro incorporates an all-mismatch detection circuit and a two-stage pipelined search mechanism. Depending on first-stage results, the second stage can be halted to reduce unnecessary energy consumption. This approach cuts search energy by up to 71.1% with column-wise pipelined search and up to 65.3% with row-wise pipelined search, depending on key partitioning.
To meet automotive safety requirements such as ISO 26262, the design also incorporates split odd and even data buses for user data and ECC parity, along with dedicated SRAM for parity storage. These measures improve error detectability and safety coverage, supporting deployment beyond networking into automotive, industrial and high-speed data processing applications.
